CHERI Alliance FounderCHERI

lowRISC® are a founding member of the CHERI Alliance and a major proponent of CHERI: Capability Hardware Enhanced RISC Instructions.

CHERI was the key technology developed in the Sunburst project, which delivered the popular Sonata platform and evaluation board. Today, CHERI is used in all of lowRISC’s products and stewarded projects: Ibex, OpenTitan and COSMIC .

Memory safety and CHERI

The exploitation of memory vulnerabilities is a very common route of attack against software. At lowRISC we believe that the best approach to protecting your system against this type of attack is by taking a multi-pronged approach: improving the quality of your software with static analysis tools, adopting memory-safe languages, and letting the hardware enforce memory safety policies.

RISC-V processors, such as Ibex® and CVA6-CHERI can address memory safety in hardware through the addition of the powerful CHERI technology, which also impacts the design of the memory system.

CHERI helps by both reducing the likelihood and impact of memory attacks:

Providing more robust memory safety, with the processor architecture together with standard software tools delivering protection against buffer overflows, and stack and heap attacks

Enabling the developer to finely compartmentalise their code, and providing isolation between different compartments. Even if a device is compromised, the hacker cannot use it to gain access to the majority of the code

Developing with CHERI

Today lowRISC provides two implementations of CHERI on FPGA boards:

  • The Sonata platform provides an embedded implementation of CHERI – CHERIoT – in its CHERIoT-Ibex processor. CHERIoT-Ibex was created by Microsoft and verified by lowRISC as part of the Sunburst project
  • The CHERI-Mocha design provides an application-class implementation of CHERI in the CVA6-CHERI processor, which was created by Capabilities Ltd and verified by lowRISC 

In the meantime, we are leveraging the learnings and code from Sonata to enhance the OpenTitan Earl Grey discrete RoT with CHERI capabilities, which will be available in hybrid CHERIoT/ePMP mode to deliver backwards compatibility. This will deliver a production-ready, security hardened upgrade to CHERIoT-Ibex and Sonata.

lowRISC has an excellent understanding of CHERI and provides services around it:

  • Adding CHERI to existing open source processor implementations, and their compute subsystems
  • Developing CHERI software, models and tools
  • And a host of other services
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