Articles and Videos

lowRISC’s Vision for open silicon

This article explores why we think that open silicon is a good thing, what a future in which open silicon is commonplace looks like, and how far we are from such a future.

Silicon Commons: a Process for open silicon

This article explores in detail some of the differences between open-source software and hardware, and how the process of running open-source projects needs to be modified to make it suitable for silicon projects. We call this process the Silicon Commons®.

Secure silicon by design

This article explores the threat of cybercrime and how hardware is evolving to better resist cyberattacks. It also covers the pros and cons of security by design and security by secrecy and the practical issues to deal with open-source secure silicon designs.

OpenTitan’s Transition to Side-Channel Resilient Post-Quantum Cryptography

Today, numerous partners are invested in OpenTitan’s success — countering not just today’s security challenges but also preparing for the post quantum cryptography (PQC) era.

Ibex Inside

Ibex is the main CPU in the OpenTitan root of trust and is used in many commercial SoC designs. This article explores the work lowRISC did to create Ibex, and their motivations.

Memory Safety Impact on Ibex Area

Comprehensive article on the impact of adding CHERI capabilities to the Ibex processor in terms of area (and cost), and how it compares to alternatives like PMP.

How we Run CI for open-source Silicon Projects

Three different ways that we test hardware designs for OpenTitan, each of which gives us a different kind of coverage and also comes with different resource constraints that affect how we run them.

Correctness proof of Ibex

The proof establishes that the Ibex RTL and the Sail RISC-V specification will produce the same sequence of memory operations in the same order forever, provided equivalent inputs.