The lowRISC 0.4 milestone release is now available. The various changes are best described in our accompanying documentation, but in summary this release:

  • Moves forward our support for tagged memory by re-integrating the tag cache, reducing overhead with a hierarchical scheme. This will significantly reduce caches misses caused by tagged memory accesses where tags are distributed sparsely.
  • Integrates support for specifying and configuring tag propagation and exception behaviour.
  • PULPino based “minion core” has been integrated, and is used to provide peripherals such as the SD card interface, keyboard, and VGA tex display (when using the Nexys4 DDR FPGA development board).

Please report any issues on our GitHub repository, or discuss on our mailing list. As always, thank you to everyone who has contributed in any way – whether it’s advice and feedback, bug reports, code, or ideas.

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lowRISC is a not-for-profit company using collaborative engineering to develop and maintain open source silicon designs and tools, through a unique combination of skills, expertise and vision.

We provide a home for multi-partner projects that deliver verified, high quality IP and tools, which provide the solid foundations that are necessary for the rapid development cycles required for next generation silicon products. lowRISC employs an engineering team in Cambridge, UK, working on our own developments, partner projects, and work-for-hire that is aligned with our mission.

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