History

Key milestones in lowRISC’s history.

The Newsroom contains details of all these milestones, and more.

OpenTitan devices reach volume production shipping in commercial products.
The COSMIC project launches to implement a CVA6-CHERI-based secure enclave.
lowRISC contributes IP and engineering effort to the first release of Caliptra

The first OpenTitan chip reaches commercial availability, with validated chips in hand
lowRISC releases the Sonata® platform as the first hardware implementation of the CHERIoT extension in the RISC-V architecture

lowRISC partners with the UK Research and Innovation (UKRI) on the Digital Security by Design program to foster the deployment of CHERI

lowRISC acquires NewAE, the creators of ChipWhisperer, bringing extra hardware security skills

lowRISC opens a technical office in Zurich, developing a stronger connection to ETH Zurich.
lowRISC wins the OpenUK hardware award for the first time

The OpenTitan project is officially launched, with founding members Google, G+D, Western Digital, ETH, Nuvoton and lowRISC
The Ibex CPU is released
The LLVM RISC-V backend, started by lowRISC, graduates from “experimental” to “official”

OpenTitan® project starts
ETH Zurich donates their zero-riscy core (which will become Ibex®) to OpenTitan
Google joins the lowRISC board

lowRISC® co-founder Alex Bradbury proposes a new LLVM RISC-V backend, based on a set of modular patches he was developing

lowRISC® is founded in Cambridge, UK as a spin-off from the University of Cambridge
Early work revolves around RISC-V compilers and CPUs