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This document describes our current thinking on two aspects of the lowRISC SoC, namely tagged memory and ‘minion’ cores usable for I/O and other tasks. We are sharing it at this early stage in the spirit of “release early, release often” and to benefit from input and ideas from the wider community.

Please post any comments or questions either in the discussion thread below, or on our mailing list. To keep informed of future development, subcribe to our announcements list and follow @lowRISC.