Tutorial for the v0.5 lowRISC preview release

By Jonathan Kimmitt, Wei Song and Alex Bradbury (also see acknowledgements below)

Release version 0.5 (12-2017)


lowRISC is a not-for-profit organisation whose goal is to produce a fully open source System-on-Chip (SoC) in volume. We are building upon RISC-V processor core implementations from the RISC-V team at UC Berkeley. We will produce a SoC design to populate a low-cost community development board and to act as an ideal starting point for derivative open-source and commercial designs.

This tutorial adds further functionality towards the final SoC design:

The build environment and pre-built images support the same platform as the previous releases, a competitively priced Nexys™4 DDR Artix-7 FPGA Board.

Rocket Priv. Spec.??1.7nearly 1.91nearly 1.91
Tagged memory***
untethered operation***optional
SD cardtetheredSPISPISDSD
UART consoletetheredstandardstandard/tracestandard/trace/VGAstandard/trace/VGA
PS/2 keyboard**
Minion Core*
Kernel md5 boot check**
PC-free operation**
Remote booting*
Multiuser operation


  1. Overview of the Ethernet system
  2. Prepare the environment

  3. Demo

  4. Release notes

Work planned / In progress / TO DO


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